دانلود کتاب هوش مصنوعی تعبیه‌شده، پلی بین سخت‌افزار و یادگیری عمیق

The IEEE CAS Seasonal School on Technologies for Artificial Intelligence aims to address the massive skill gap between embedded technology and deep learning applications. Supported by three H2020 European projects, including FVLLMONTI, HERMES, and Radio Spin, the happening marks a series of events for the transdisciplinary community of Embedded Artificial Intelligence. Current Al and deep learning applications demand substantial computing resources, often compromising security and privacy. Embedded Artificial Intelligence offers a solution by executing machine learning models on edge devices. This requires integrating software and hardware solutions with optimized machine learning models and developing lightweight, energy efficient hardware for neural networks. The IEEE CAS Seasonal School on Technologies for Artificial Intelligence equips participants with the interdisciplinary skills to innovate in circuit architectures and execute data intensive applications on resource-constrained devices. The summer school’s interdisciplinary nature is reflected in its comprehensive curriculum, covering topics from fabrication and characterization to neuromorphic device design and simulation. Participants gained insights into hardware aspects of neural networks, focusing on introductory features of neural networks, hardware enhancement using Artificial Intelligence, electrical characterization of functionality, logic cell design, system simulation and exploration, TCAD and compact modeling using 3D layout, fabrication of vertical Gate All Around (GAA) transistors, spintronics for hardware neural network accelerators, 6G: design of transceivers implemented in an autonomous system, communications at sub-THz frequencies in CMOS technology, transformer architectures for machine translation and speech processing, and applications in recognition of RF fingerprints and breast cancer. The summer school’s program starts with foundational content on technology layers, advancing to circuit design, neural network implementation, and specific applications. Day two features parallel sessions with limited access to the characterization room for on-wafer measurement, divided into groups for focused learning.