دانلود کتاب قابلیت اطمینان آی‌سی‌های آنالوگ CMOS

The use of statistical approach for reliable and optimal design of systems, including electronic systems, has become quite popular. Statistically designed experiments/simulations have been used extensively for estimating or demonstrating existing reliability by identifying the important parameters (factors) affecting reliability out of many potentially important ones. This statistical approach ensures the performance and safety of critical electronic systems employed in space, nuclear, automotive, defence industry, submarine, and aerospace applications, to name a few. In most reliability studies on modeling the hot-carrier effect available in the literature, models based on physical properties have been proposed; however, difficulties in preparation of physical models, losing the actuality within the advances in the technology, and excessively long simulation times seem to be disadvantages of these models. To overcome these disadvantages of physical models, statistical methods based on the observation results, independent of the technology, and exhibiting a short simulation time and high accuracy have been introduced in our work. Although digital signal processing is becoming increasingly more powerful and many types of signal processing have indeed moved to digital domain due to the advances in IC technology, analog circuits are fundamentally necessary in many complex and high performance systems. This is caused by the fact that naturally occurring signals are analog. In other words, analog circuits act as a bridge between the real world and digital systems. In analog signal processing, many circuit topologies including active filters, oscillators, immittance simulators, etc. have been proposed in the literature. Application area of analog signal processing is wide and ranges from very low frequencies at several Hz levels to RF applications operating at GHz level, which means from biomedical and sonar signals to cognitive radio and encrypted communications. Today, modern CMOS technologies are continuously scaling down; but as a result of this, analog designers have serious reliability problems in their designs caused by physical effects. This book gives a review of our previously performed and published works in the open literature on statistical method-based modeling of the experimental studies on degradation in the drain current and threshold voltage of the NMOS and PMOS transistors, including power MOSFETs. All these works were performed by our research group in the frame of Ph.D. and M.Sc. thesis works in Istanbul University and Istanbul Technical University. Note that these models are based on the observa¬tions by operating the device under stress voltage conditions. We believe that this book will be useful for analog circuit designers working in the related area and provides a simple and useful alternative to physical methods available in the literature.