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Computing systems at all scales (from mobile handheld devices to supercomputers, servers, and large cloud-based data centers) have seen significant performance gains, mostly through the continuous shrinking of the complementary metal-oxide semiconductor (CMOS) feature size that has doubled the number of transistors on a chip with every technology generation. However, power dissipation has become the fundamental barrier to scale computing performance across all platforms. As the classical Dennard scaling is coming to an end, reduction in on-chip power consumption as well as a throughput increase (as per Moore’s Law) have become serious challenges. Computation at the nanoscales necessitates fundamentally different approaches. These approaches rely on different computational paradigms that exploit features in the targeted set of applications as well as exploiting unique interactions between hardware, software, and the processing algorithms of a computing system.